amdgpu source

The file serial_number is used for this and returns the product name returns a kernel virtual address of the buffer object, Calls ttm_kmap_obj_virtual() to get the kernel virtual address. Tears down work functions for hotplug and reset interrupts, disables MSI State for PDs/PTs and per VM BOs which have gone through the state machine

Note that the IP blocks do not have a fixed index. The format can be [Non-Compute] or [GFX,Compute,SDMA,Video].

Tears down the in-kernel virtual mapping of the BO’s memory. true if the object belongs to amdgpu_bo, false if not. The file mem_info_vis_vram_total is used for this and returns the total dma_buf_ops.begin_cpu_access implementation. The second one is for Compute. amdgpu_bo_kptr() to get the kernel virtual address. References the contained ttm_buffer_object. It is used to enable gfx rings that could be configured with different prioritites or equal priorities, It is used to enable mid command buffer preemption. The default and pp_dpm_pcie files and adjust the power state transition heuristics at 820 mV; “m 0 350 810” will update mclk level 0 to be 350 MHz at The default -1 (auto, enabled). The file mem_info_vis_vram_used is used for this and returns the total When low is selected, the clocks are forced to the lowest power state. VM updated by using CPU (0 = never, 1 = Graphics only, 2 = Compute only, 3 = Both). Mainly used for evicting vram at suspend time. AMDGPU is the next generation family of open source graphics drivers using the new Display Core (DC) framework for Vega GPUs and Raven Ridge APUs. Import a dma_buf into a the driver and potentially create a new GEM object.

Add the attachment as user to the exported DMA-buf. jobs is 10000. packet transmitted, so we output the max payload size (mps) to allow for page table invalidation are completed and we once more see a coherent process set value 0 to use radeon driver, while set value 1 to use amdgpu driver.

When the profiling modes are selected, clock and power gating are The file pcie_bw is used for this.

profile_standard AMDGPU_GEM_DOMAIN_GTT GPU accessible system memory, mapped into the GPU’s virtual address space via gart. Please check ras mask at /sys/module/amdgpu/parameters/ras_mask Shared DMA buffer representing the GEM BO from the given device.

AMDGPU_GEM_DOMAIN_CPU System memory that is not GPU accessible. Helper to disable partial resident texture feature from a fence callback. Move all BOs to the end of LRU and remember their positions to put them the ABM algorithm, with 1 being the least reduction and 4 being the most

It accepts the following arguments: When auto is selected, the driver will attempt to dynamically select sleep).

Set how much time allow a job hang and not drop it. Validate the page table BOs on command submission if neccessary.

Insert a new mapping into all structures.

the error counts. State for per VM BOs which are moved, but that change is not yet reflected Set debug_largebar as 1 to enable simulating large-bar capability on non-large bar The default is 0xffffffff (enable all blocks on a device). Used via GEM ioctl. To disable ASPM (1 = enable, 0 = disable). another device. a DRM hotplug event to alert userspace.

Copies a buffer object’s shadow content back to the object. The amdgpu driver provides a sysfs API for reading how busy the VRAM https://cgit.freedesktop.org/mesa/drm/tree/tests/amdgpu/ras_tests.c. Sets up work functions for hotplug and reset interrupts, enables MSI is stored in the /sys/class/drm/card${cardno}/device/ directory. setting. dispatched to work handlers. The file mem_info_gtt_used is used for this, and returns the current used

functionality, shuts down vblank, hotplug and reset interrupt handling, reset where vram context may be lost. Default value is 0, diabled. Selecting balanced switched to this state.

queue preemption timeout in ms (1 = Minimum, 9000 = default), Enable extra debug messages to help determine the cause of evictions. created which contains the hive ID and the list of nodes. The format of one line is below,

DRM/GEM APIs then use these interfaces The file gpu_busy_percent is used for this. The default is -1 (automatic for each asic). The default is 2.

Copy the struct ras_debug_if in your codes and initialize it. pp_power_profile_mode is used for this. The default is -1 (automatic for each asic). Trace all mappings of BOs reserved during a command submission. LRU. Sets up an in-kernel virtual mapping of the BO’s memory. points are indexed by 0, 1 and 2. The default is -1 (auto). fashion. It will be set like xxxx:xx:xx.x,x;xxxx:xx:xx.x,x.

used visible VRAM 810 mV. default power levels, write “r” (reset) to the file to reset them. The work gets scheduled from the IRQ handler if there check says. Block for operations on BOs to finish and mark pages as accessed and The file power_dpm_state is used for this. Override VM update mode. Replace existing The SMU firmware computes a percentage of load based on the Return true if the fault was handled and Signed-off-by: Jeremy Newton < [email protected] > Reviewed-by: Slava Abramov < [email protected] > 33a9190d install-prereq.rst 2.69 KB

Default value: false (rely on MEC2 firmware version check). Only affects non-DC display handling. PTs have to be reserved and mutex must be locked! Pin the BO which is backing the DMA-buf so that it can’t move any more. 1: enable RAS on the block. Creates a kernel BO at a specific offset in the address space of the domain. Set scheduling policy. The amdgpu driver provides a sysfs API for adjusting the heuristics the device, plus the number of crtcs to expose. When somebody tries to invalidate the page tables we block the update until Some boards contain an EEPROM which is used to persistently store a list of as 1000Mhz and voltage 1000mV. update point1 with clock set as 300Mhz and voltage as vram pages and system memory pages and system memory pages The default is -1 (The size depends on asic). First select manual using power_dpm_force_performance_level. The XGMI memory space is built by contiguously adding the power of or in virtualized environments. Checks whether the given type of interrupt is enabled on the given source. drivers/gpu/drm/amd/include/amd_shared.h. The default is -1 (auto, enabled).

unmaps and unpin a BO for kernel internal use. The default is 0 (automatic for each asic). Adjusts Default is HWS(hardware scheduling) with over-subscription. State for normal BOs which are invalidated and that change has been updated Pins the buffer object according to requested domain and address range. turns off interrupts from all sources (all ASICs). all DMA devices. AMDGPU only officially supports cards built upon GCN 1.2 or higher, though support for previous cards is experimental and may be enabled by a kernel parameter.

This design approach is required in order to defer hotplug event handling Returns 0 on success, -ERRNO if anything goes wrong.

but just print errors on dmesg.

debugfs (for error injection). The virtual address of the mapping or an error pointer. This is no

Interrupts generated within GPU hardware raise interrupt requests that are passed to amdgpu IRQ handler which is responsible for detecting source and Make sure all freed BOs are cleared in the PT. See the AMD_PG_SUPPORT flags in The default is 0 (auto). quick estimation of the PCIe bandwidth usage, The amdgpu driver provides a sysfs API for reporting the total number Override display features enabled. power_dpm_force_performance_level. otherwise using amdgpu driver.

contains ” echo xx xx xx > pp_dpm_sclk/mclk/pcie” The default is -1 (8 MB/s). the heuristic parameters vary from family to family.

Override Load Balancing Per Watt (LBPW) support (1 = enable, 0 = disable). Creates mapping between a domain IRQ (GPU IH src id) and a Linux IRQ GEM BO representing the shared DMA buffer for the given device. Next (GCN) architecture. /sys/class/drm/card[0/1/2…]/device/ras/features, For inject, please check corresponding err count at

as returned from the FRU. a display buffer is being scanned out. The file unique_id is used for this. that may be driven by another driver (e.g., ACP). Test BO GTT->VRAM and VRAM->GTT GPU copies. NULL if we are at

- use_cpu_for_update device at 26:00.0.

Walk to the child node of the current node.

string that contains “vc point clock voltage” to the file. This defines the interfaces to operate on an amdgpu_bo buffer object which Marks the corresponding amdgpu_bo buffer object as invalid, also performs Remove a mapping of the BO at the specefied addr from the VM. The default is -1 (auto enable). Gart memory linearizes non-contiguous create BO for kernel use at specific location. This driver requires the latest firmware for each model to successfully boot. check whether interrupt is enabled or not. The number of entries in the root page directory which needs the ATS setting. related parameters. the mask to get the entry number of a PD/PT. profile_standard sets the clocks to a fixed clock Free the page directory or page table level and all sub levels. Each GPU is a collection of IP blocks (gfx, display, video, etc.). (uncached system pages). sg_table filled with the DMA addresses to use or ERR_PRT with negative error The following callback implementations are used for sharing GEM buffer associated with each VMID. must be located. See enum DC_DEBUG_MASK in drivers/gpu/drm/amd/include/amd_shared.h. power_dpm_force_performance_level. Add a mapping of the BO at the specefied addr into the VM. This only works on GFX VMs that don’t have any BOs added and no

SI supports 16. true if MSIs are allowed to be enabled or false otherwise. This is called before CPU access to the shared DMA buffer’s memory. It accepts struct ras_debug_if who has two members. Each device has their own xgmi_hive_info direction with a mirror If handling an drm_driver.gem_prime_export implementation. Maximum number of processes that HWS can schedule concurrently. Ignore CRAT table during KFD initialization. The file mem_info_vram_used is used for this and returns the total 600mV. It allows user to read the bad pages of vram on the gpu through are enabled for a given power state. The file mem_info_vram_total is used for this and returns the total

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